Memory Issues Chair

It is well known that the use of cache memory significantly improves the performance of a computing system. There exists a large quantity of technical literature dealing with analysis and design of cache-based systems. One of the most recent trends in computer technology is to implement multilevel caches. Today, most new processors implement an on-chip dual cache; one for instructions and one for data [ 1,2]. One of the new, highperformance processors, the 300 MHz DEC Alpha 21164 has two levels of on-chip cache: a dual first level (Ll) cache of 8 KB instruction and 8 KB data, and a second level (L2) on-chip cache of 96 KB [2,3]. A third level cache (L3) may optionally be connected outside of the chip. Despite the large amount of literature dedicated to the subject of cache management, there is a very small amount of sources dealing with the performance of multilevel caches.